(1) Field of the Invention
The invention relates to the general area of programmable logic and memory, more particularly to antifuses for use in those technologies.
(2) Description of the Prior Art
In recent years the popularity of field programmable logic and write-once memories has grown significantly. These systems are generally based on antifuses. The latter are connections between wires that are initially open circuits but which can, through suitable external means, be selectively (and irreversibly) converted to short circuits.
One of the ways to activate an antifuse is by applying a suitable voltage (generally less than about 20 volts) across it. This causes the antifuse to change from its insulating to its conducting state in a few microseconds. For a typical antifuse of the current art, having an area of about 4-10 square microns, the resistance in the open state will be about 10.sup.9 -10.sup.12 ohms while the resistance in the conducting state will be about 50-500 ohms.
Many antifuse systems are based on amorphous silicon, which has high resistivity, but which, after heating, recrystallizes and drops its resistivity substantially. An example of this type of antifuse is given by Roesner (U.S. Pat. No. 4,796,074 January 1989). Other types of material mentioned by Roesner include germanium, carbon and tin and all depend on a change in grain size from amorphous, or very small crystallites, to relatively large grains. An additional drop in resistivity is achieved by the activation of interstitial dopant atoms (such as might be introduced through ion implantation). Thus Roesner teaches that the maximum temperature to which antifuse material may be exposed during processing must be less than about 600.degree. C.
A number of improvements in the details of how to manufacture antifuses of the amorphous silicon type have been described by Dixit (U.S. Pat. No. 5,322,812 June 1994). Of particular importance is the maintenance of a high level of cleanliness. The maximum processing temperature is kept to about 540.degree. C. and great care is taken to avoid the presence of nitrogen since small amounts of silicon nitride were found to degrade the performance of the antifuses.
Some other examples of antifuses based on amorphous silicon include those disclosed by Favreau (U.S. Pat. No. 5,412,245 May 1995), Iranmanesh (U.S. Pat. No. 5,440,167 August 1995), Lee et al. (U.S. Pat. No. 5,447,880 September 1995), and Holzworth et al. (U.S. Pat. No. 5,384,481 January 1995). The structures disclosed in these patents are all built on the idea of placing the antifuse at the bottom and along the sides of a hole. This implies multiple processing steps in the formation of the complete antifuse structure as well as the introduction of potential failure points where various layers associated with the antifuse cross the edge of the hole. Additionally, this approach presents some difficulties when scaling down in size.
In FIG. 1 we show a typical antifuse structure illustrative of the current art (taken from the Holzworth patent cited above). Aluminum layer 2 has been deposited on silicon oxide layer 1. First refractory metal layer 3 lies on layer 2 while etch stop layer 4 lies on top of it. This is all covered by silicon oxide layer 5 in which hole 6 has been formed. Layer 7 comprises the antifuse material itself (amorphous silicon) while layers 8 and 9 comprise second refractory metal and aluminum layers respectively.
It should also be mentioned that there is at least one alternative antifuse system to the amorphous semiconductor variety discussed above. This is one that is based on oxide-nitride-oxide (ONO). ONO comprises a structure of three layers--silicon oxide, silicon nitride, and silicon oxide. When such a structure is subjected to a suitable applied voltage (typically about 16 volts) its resistance changes from about 10.sup.12 ohms to about 500 ohms.